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W83L784R/ W83L784G
W83L784R/W83L784G Winbond H/W Monitoring IC
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/G
W83L784R Data Sheet Revision History
PAGES DATES VERSION VERSION ON WEB MAIN CONTENTS
1 2 3 4 5 6
n.a. n.a. P.56-57 P.56 P.57 4/99 6/99 6/99 9/99 10/99 P.36 P. 9 0.5 0.52 0.53 0.54 0.55
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All the versions before 0.50 are for internal use. First publication. Schematics updated Corrected the length (D) from 10.2mm to 7.2mm in the package outline table. Updated V0.5 schematics adding pull-high resistors for RESET# (pin15) This update is for C version IC. Update CR [54h] register for PWMOUT function. Change Pin 15 from output to open-drain.
7 8
n.a. n.a.
4/02 4/06
1.0 1.1
1.0 1.1
Change version and version on web site to 1.0 Add lead-free package version
Please note that all data and specifications are subject to change without notice. All the trade marks of products and companies mentioned in this data sheet belong to their respective owners. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales.
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Publication Release Date: Apr. 2006 Revision 1.1
W83L784R/G
Table of Contents1. 2. GENERAL DESCRIPTION............................................................................................................. 1 FEATURES .................................................................................................................................... 1 2.1 2.2 2.3 2.4 2.5 3. 4. 5. 6. Monitoring Items.................................................................................................................... 1 Actions Enabling.................................................................................................................... 2 Power Good .......................................................................................................................... 2 General.................................................................................................................................. 2 Package ................................................................................................................................ 2
KEY SPECIFICATIONS ................................................................................................................. 2 PIN CONFIGURATION .................................................................................................................. 3 PIN DESCRIPTION........................................................................................................................ 4 FUNCTIONAL DESCRIPTION....................................................................................................... 6 6.1 6.2 General Description............................................................................................................... 6 Access Interface.................................................................................................................... 6
6.2.1 6.2.2 The first serial bus access timing is shown as follows: ...........................................................6 The serial bus timing of the temperature CPUT1 and CPUT2 is shown as follow: .................7 Monitor over 4.096V voltage:................................................................................................10 Power good for 3V and 5V....................................................................................................10 Battery Fault Alarm...............................................................................................................11 Monitor temperature from thermistor: ...................................................................................12 Monitor temperature from Pentium IITM thermal diode or bipolar transistor 2N3904 ...........12 Over Temperature ................................................................................................................12 Fan speed count...................................................................................................................14 Fan speed control.................................................................................................................15 Smart Fan Control ................................................................................................................16 Fan Fault Alarm ....................................................................................................................18 Temperature.........................................................................................................................18 Voltage .................................................................................................................................20 Fan .......................................................................................................................................20
6.3
Analog Inputs ........................................................................................................................ 9
6.3.1 6.3.2 6.3.3
6.4
Temperature Measurement Machine .................................................................................. 11
6.4.1 6.4.2 6.4.3
6.5
FAN Speed Count and FAN Speed Control........................................................................ 13
6.5.1 6.5.2 6.5.3 6.5.4
6.6
SMI# .................................................................................................................................... 18
6.6.1 6.6.2 6.6.3
7.
REGISTERS AND RAM ............................................................................................................... 21 7.1 7.2 7.3 Configuration Register -- Index 40h .................................................................................... 21 Interrupt Status Register 1 -- Index 41h .............................................................................. 21 Interrupt Status Register 2 -- Index 42h .............................................................................. 22 Publication Release Date: Apr. 2006 Revision 1.1
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W83L784R/G
7.4 7.5 7.6 7.7 7.8 7.9 SMI Mask Register 1 -- Index 43h....................................................................................... 22 SMIY Mask Register 2 -- Index 44h .................................................................................... 23 Real Time Hardware Status Register I -- Index 45h ........................................................... 23 Real Time Hardware Status Register II -- Index 46h .......................................................... 24 Reserved Register -- Index 47h- 48h .................................................................................. 24 Fan Divisor Register -- Index 49h ....................................................................................... 24
7.10 Serial Bus Address (for Voltage, Fan, and internal temperature) Register Address 4Ah... 25 7.11 CPUT1 Temperature and CPUT2 Temperature Serial Bus Address Register Index 4Bh . 25 7.12 Winbond Vendor ID (Low Byte) -- Index 4Ch (Auto Increase)............................................ 25 7.13 Winbond Vendor ID (High Byte) -- Index 4Dh (No Auto Increase) ..................................... 25 7.14 Chip ID -- Index 4Eh............................................................................................................ 26 7.15 ACPI Temperature Increment Register -- Index 4Fh .......................................................... 26 7.16 OVT# Property Select -- Index 50h ..................................................................................... 26 7.17 SMI# Property Select -- Index 51h ...................................................................................... 27 7.18 FANIN1/GPO1, FANIN2/GPO2 and BEEP/GPO3 Control Register -- Index 52h .............. 28 7.19 CPUT1/CPUT2 Thermal Sensor Type Register -- Index 53h ............................................. 29 7.20 Misc Control Register -- Index 54h...................................................................................... 29 7.21 Fan/VBAT Fault Control Register -- Index 55h ................................................................... 30 7.22 Fan 1 Fault High Limit Count -- Index 56h .......................................................................... 30 7.23 Fan 2 Fault Low Limit Count -- Index 57h ........................................................................... 30 7.24 Fan 2 Fault High Limit Count -- Index 58h .......................................................................... 31 7.25 Fan 1 Fault Low Limit Count -- Index 59h ........................................................................... 31 7.26 VBAT Fault High Limit Value -- Index 5Ah .......................................................................... 31 7.27 VBAT Fault Low Limit Value -- Index 5Bh........................................................................... 31 7.28 FAN 1 Pre-Scale Register -- Index 80h .............................................................................. 31 7.29 FAN 1 Duty Cycle Select Register -- 81h (Bank 0) ............................................................. 32 7.30 FAN 2 Pre-Scale Register -- Index 82h .............................................................................. 32 7.31 FAN2 Duty Cycle Select Register -- Index 83h................................................................... 32 7.32 FAN Configuration Register -- Index 84h............................................................................ 33 7.33 CPUT1 Target Temperature Register/ Fan 1 Target Speed Register -- Index 85h............ 33 7.34 CPUT2 Target Temperature Register/ Fan 2 Target Speed Register -- Index 86h............ 34 7.35 Tolerance of Target Temperature or Target Speed Register -- Index 87h ......................... 34 7.36 Fan 1 PWM Stop Duty Cycle Register -- Index 88h............................................................ 34 7.37 Fan 2 PWM Stop Duty Cycle Register -- 89h (Bank 0)....................................................... 35 7.38 Fan 1 Start-up Duty Cycle Register -- Index 8Ah................................................................ 35 7.39 Fan 2 Start-up Duty Cycle Register -- Index 8Bh................................................................ 35 Publication Release Date: Apr. 2006 Revision 1.1
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W83L784R/G
7.40 Fan 1 Stop Time Register -- Index 8Ch .............................................................................. 35 7.41 Fan 2 Stop Time Register -- Index 8Dh .............................................................................. 35 7.42 Fan Step down Time Register -- Index 8Eh........................................................................ 36 7.43 Fan Step up Time Register -- Index 8Fh............................................................................. 36 7.44 Temperature Sensor 1 (Internal Thermal Diode) Offset Register -- Index 90h .................. 36 7.45 Temperature Sensor 2 (CPU T1) Offset Register -- Index 91h .......................................... 37 7.46 Temperature Sensor 3 (CPU T2) Offset Register -- Index 92h .......................................... 37 8. 9. VALUE RAM AND LIMIT VALUE ................................................................................................. 38 8.1 9.1 9.2 9.3 9.4 10. Value RAM -- Index 20h- 3Fh or 60h - 7Fh......................................................................... 38 Temperature Sensor 2 Temperature Register -- Index 00h................................................ 39 Temperature Sensor 2 Configuration Register -- Index 01h............................................... 39 Temperature Sensor 2 Hysteresis Register -- Index 02h ................................................... 39 Temperature Sensor 2 Over-temperature Register -- Index 03h........................................ 39 TEMPERATURE SENSOR 2 (CPU T1) REGISTERS................................................................. 39
TEMPERATURE SENSOR 3 (CPU T2) REGISTERS................................................................. 40 10.1 Temperature Sensor 3 Temperature Register -- Index 00h................................................ 40 10.2 Temperature Sensor 3 Configuration Register -- Index 01h............................................... 40 10.3 Temperature Sensor 3 Hysteresis Register -- Index 02h ................................................... 40 10.4 Temperature Sensor 3 Over-temperature Register -- Index 03h........................................ 40
11.
SPECIFICATIONS ....................................................................................................................... 41 11.1 Absolute Maximum Ratings ................................................................................................ 41 11.2 DC Characteristics .............................................................................................................. 41 11.3 AC Characteristics............................................................................................................... 42
12. 13. 14.
HOW TO READ THE TOP MARKING ......................................................................................... 44 PACKAGE DRAWING AND DIMENSIONS ................................................................................. 45 W83L784R/G SCHEMATICS....................................................................................................... 46
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Publication Release Date: Apr. 2006 Revision 1.1
W83L784R/ W83L784G
1. GENERAL DESCRIPTION
W83L784R/G is an evolving product of W83782D/G --- Winbond's most popular hardware status monitoring IC. Specifically designed for the Notebook system, W83L784R/G can be used to monitor several critical hardware parameters of the system, including power supply voltages, fan speeds, and temperatures, which are very important for a high-end Notebook system to work stably and properly. An 8-bit analog-to-digital converter (ADC) is built inside W83L784R/G. The W83L784R/G can monitor 4 analog voltage inputs, 2 fan tachometer inputs, one on-chip internal temperature sensor and 2 remote temperature sensors. The remote temperature sensing can be performed by thermistors, or 2N3904 NPN-type transistors, or directly from IntelTM Deschutes CPU thermal diode output. The W83L784R/G provides 2 PWM (pulse width modulation) outputs for the fan speed control to support the Thermal CruiseTM system, which can maintain the CPU or system in the specific programmable temperature under the hardware control. Another Fan speed control mode is Speed Cruise to keep the fan operating in the specific RPM. On the other hand, the W83L784R/G provides low active outputs such as fan fault and Battery low which could issue the hardware warning signals when the fan speed or battery voltage drop out of the preset range. Also the W83L784R/G provides power good reset for 3V and 5V; power down mode for power saving; fault pin for necessary H/W shutdown control; SMI#, OVT#, GPO# signals for system protection events; I2CTM serial bus interface. Through the application software or BIOS, the users can read all the monitored parameters of system from time to time. And a pop-up warning can be also activated when the monitored item was out of the proper/preset range. The application software could be Winbond's Hardware DoctorTM, or IntelTM LDCM (LanDesk Client Management), or other management application software. Also the users can set up the upper and lower limits (alarm thresholds) of these monitored parameters and to activate one programmable and maskable interrupts. For the spacing saving consideration of the Notebook system, W83L784R/G is in the package of 209mil 20pins-SSOP.
2. FEATURES
2.1 Monitoring Items
* 2 thermal inputs from remote thermistors or 2N3904 NPN-type transistors or PentiumTM II (Deschutes) thermal diode output * One on-chip temperature detection * 4 voltage inputs --- typical for Vcore, +3.3V, +5V, Battery * 2 sets of fan speed control and fan speed monitoring input * WATCHDOG comparison of all monitored values * Programmable hysteresis and setting points (alarm thresholds) for all monitored items
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
2.2 Actions Enabling
* Issue fan fault signal as fans are abnomally stopped * Issue battery low signal as bettery voltage is abnomally out of range * 2 PWM (pulse width modulation) outputs for fan speed control to support Thermal CruiseTM or Speed CruiseTM --- Automatically maintain the CPU or system in the specific temperature or keep the fans in the specific speed under the H/W control * Issue SMI#, OVT#, GPO to activate system protection * PWR_DN# setting for the Power down mode * Warning signal pop-up in application software
2.3
Power Good
* Issue RESET# outputs as the Power Good signal when 3V and 5V rise across a reset threshold.
2.4
* IC
2
General
TM
serial bus interface
* IntelTM LDCM (DMI driver 2.0) support * AcerTM ADM (DMI driver 2.0) support * Winbond hardware monitoring application software (Hardware DoctorTM ) support, for both Windows 95/98 * Meet WfM 2.0 (Wired for Management) spec. * 5V Vcc operation
2.5
Package
* 20-pin SSOP (209mil)
3. KEY SPECIFICATIONS
* Voltage monitoring accuracy * Monitoring Temperature Range and Accuracy * Supply Voltage * Operating Supply Current * Power Down Suppy Current * ADC Resolution - 40C to +120C 1% (Max) 3C(Max) 5V 2 mA typ. 0.5 mA 8 Bits typ.
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
4. PIN CONFIGURATION
FANIN1/GPO1 FANIN2/GPO2 PWMOUT1 PWMOUT2 FANFAULT#/GPO3 PWR_DN# SMI# OVT# SCL SDA 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC CPUT1/PII1 CPUT2/PII2 VREF VIN1 RESET# VIN2(+3.3VIN) VIN3(VBAT) GND BATFAULT#/GPO4
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
5.
I/O12t I/O12ts OUT12 AOUT OD12 INt INts AIN
PIN DESCRIPTION
- TTL level bi-directional pin with 12 mA source-sink capability - TTL level and schmitt trigger - Output pin with 12 mA source-sink capability - Output pin(Analog) - Open-drain output pin with 12 mA sink capability - TTL level input pin - TTL level input pin and schmitt trigger - Input pin(Analog)
PIN NAME
PIN NO.
TYPE
DESCRIPTION
FANIN1 GPO1 FANIN2 GPO2
/
1
IN t s / OUT1 2 IN t s / OUT1 2 OD12 / OUT1 2 OD12 / OUT1 2 OD1 2
/
2
PWMOUT1
3
PWMOUT2
4
FANFAULT# GPO3 PWR_DN# SMI# OVT# SCL SDA BATFAULT# GPO4
/
5
6 7 8 9 10 11
INt OD12 OD12 INt s OD12 OD1 2
/
0V to +5V amplitude fan tachometer input. (Default) / General purpose output. This multi-functional pin is programmable. 0V to +5V amplitude fan tachometer input. (Default) / General purpose output. This multi-functional pin is programmable. Fan speed control PWM output. This pin is default open-drain. It can be programmed as an output pin which can drive a HIGH or a LOW. Fan speed control PWM output. This pin is default open-drain. It can be programmed as an output pin which can drive a HIGH or a LOW. Active-Low output. This pin will be a logic LOW when fan1 or fan2 is abnormally stopped. (Default) / General purpose output. This multi-functional pin is programmable. Power down input. When set this pin LOW, all output pins would be tristate except the pin15 RESET# which will keep HIGH. System Management Interrupt. Over temperature Shutdown Output. Serial Bus Clock. Serial Bus bi-directional Data. Active-Low output. This pin will be a logic LOW when Battery abnormally drops below the low limit or above the high limit. (Default) / General purpose output. This multi-functional pin is programmable. Ground. 0V to 4.096V FSR Analog Inputs. (This pin should be connected to DC BATTERY. If this voltage is above 4.096V, it should be reduced with the external resistors so that the input voltage will be under 4.096V) Publication Release Date: Jan. 2005 Revision 1.1
GND VIN3(VBAT)
12 13
Ground AIN
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W83L784R/ W83L784G
PIN DESCRIPTION, continued.
PIN NAME
PIN NO.
TYPE
DESCRIPTION
VIN2(+3.3VIN) RESET#
14 15
AIN OD1 2
0V to 4.096V FSR Analog Inputs. (This pin should be connected to 3VCC) Active-Low reset output. RESET# remains LOW while the 5VCC and +3.3V are below the reset threshold. It remains LOW for 200ms after the reset condition is terminated. 0V to 4.096V FSR Analog Inputs. Reference Voltage. Thermistor terminal input.(Default) / PentiumTM II diode input. This multi-functional pin is programmable.
VIN1(VCORE) VREF CPUT2 PII2 CPUT1 PII1 VCC / /
16 17 18
AIN AOUT AIN
19
AIN
Thermistor terminal input.(Default) / PentiumTM II diode input. This multi-functional pin is programmable.
20
POWER
+5VCC power supply input.
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
6. FUNCTIONAL DESCRIPTION
6.1 General Description
The W83L784R/G provides at most 4 analog positive inputs, 2 fan speed monitors, 2 sets for fan PWM (Pulse Width Modulation) Smart Fan Control , 2 remote thermal inputs from remote thermistors or 2N3904 transistors or PentiumTM II (Deschutes) thermal diode outputs and one on-chip thermal detection. W83L784R/G also provides the power good (reset) output for 3V and 5V power detection and two fault output pins issuing hardware warning if battery and fans become abnormal. When starting the monitor function on the chip, the watch dog machine monitor every function and store the value to registers. If the monitor value exceeds the limit value, the interrupt status will be set to 1.
6.2
Access Interface
The W83L784R/G provides I2C Serial Bus to read/write internal registers. In the W83L784R/G there are three serial bus addresses. The first address defined at CR [4Ah] can read/write all registers excluding CPUT1/CPUT2 temperature sensor registers and its address default value is 0101101. The address for CPUT1 defined at CR [4Bh] bit2-0 only read/write CPUT1 temperature sensor registers and the address default value is 1001001. The address for CPUT2 defined at CR [4Bh] bit2-0 only read/write CPUT1 temperature sensor registers and the address default value is 1001000.
6.2.1
The first serial bus access timing is shown as follows:
(a) Serial bus write to internal address register followed by the data byte
0 SCL SDA
Start By Master
7
8
0
7
8
0
1
0
1
1
0
1
R/W
Ack by 784R
D7
D6
D5
D4
D3
D2
D1
D0
Ack by 784R
Frame 1 Serial Bus Address Byte 0
Frame 2 Internal Index Register Byte 7 8
SCL (Continued) SDA (Continued) D7 D6 D5 D4 D3 D2 D1 D0
Ack by 784R Stop by Master
Frame 3 Data Byte
Figure 1. Serial Bus Write to Internal Address Register followed by the Data Byte
(b) Serial bus write to internal address register only
0 SCL SDA
Start By Master
7
8
0
7
8
0
1
0
1
1
0
1
R/W
Ack by 784R
D7
D6
D5
D4
D3
D2
D1
D0
Ack by 784R Stop by Master
Frame 1 Serial Bus Address Byte 0
Frame 2 Internal Index Register Byte
Figure 2. Serial Bus Write to Internal Address Register Only
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
(c) Serial bus read from a register with the internal address register prefer to desired location
0 SCL SDA
Start By Master
7
8
0
7
8
0
1
0
1
1
0
1
R/W
Ack by 784R
D7
D6
D5
D4
D3
D2
D1
D0
Ack by Master Stop by Master
Frame 1 Serial Bus Address Byte 0
Frame 2 Internal Index Register Byte
Figure 3. Serial Bus Read from Internal Address Register
6.2.2
The serial bus timing of the temperature CPUT1 and CPUT2 is shown as follow:
(a) Typical 2-byte read from preset pointer location (Temp, TOS, THYST)
0 SCL SDA
Start By Master
7
8
0
... ...
D1
7
8
0
... ...
D1
7
0
1
0
1
1
0
1
R/W
Ack by 784R
D7
D0
Ack by Master
D7
D0
No Ack by Master Stop by Master
Frame 1 Serial Bus Address Byte
Frame 2 MSB Data Byte
Frame 3 LSB Data Byte
Figure 4. Typical 2-Byte Read From Preset Pointer Location
(b)Typical pointer set followed by immediate read for 2-byte register (Temp, TOS, THYST)
0 SCL SDA
Start By Master
7
8
0
4
1
0
0
1
A2
A1
A0
R/W
Ack by 784R
0
0
0
0
0
0
D1
D0
Ack by 784R
Frame 1 Serial Bus Address Byte
Frame 2 Pointer Byte
0 SCL SDA
Start By Master
7
8
0
1
0
0
1
A2
A1
A0
R/W
Ack by 784R
D7
... ...
7
8
0
D1
D0
Ack by Master
D7
... ...
7
D1
D0
No Ack by Master Stop by Master
Frame 3 Serial Bus Address Byte 0
Frame 4 MSB Data Byte
Frame 5 LSB Data Byte
Figure 5. Typical Pointer Set Followed by Immediate Read for 2-Byte Register
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
(c) Typical read 1-byte from configuration register with preset pointer
0 SCL SDA
Start By Master
7
8
0
7
8
1
0
0
1
A2
A1
A0
R/W
Ack by 782D
D7
D6
D5 Frame 2 Data Byte
D4
D3
D2
D1
D0
No Ack by Master Stop by Master
Frame 1 Serial Bus Address Byte
Figure 6. Typical 1-Byte Read From Configuration With Preset Pointer
(d) Typical pointer set followed by immediate read from configuration register
0 SCL SDA
Start By Master
7
8
0
4
7
8 ...
1
0
0
1
A2
A1
A0
R/W
Ack by 784R
0
0
0
0
0
0
D1
D0
Ack by 784R
...
Frame 1 Serial Bus Address Byte
Frame 2 Pointer Byte
0 SCL (Cont..) SDA (Cont..)
Repea Start By Master
7
8
0
7
8
1
0
0
1
A2
A1
A0
R/W
Ack by 784R
D7
D6
D5
D4
D3
D2
D1
D0
No Ack by Master Stop by Master
Frame 3 Serial Bus Address Byte
Frame 4 MSB Data Byte
Figure 7. Typical Pointor Set Followed by Immediate Read from Temp 2/3 Configuration Register
(e) Temperature configuration register Write
0 SCL SDA
Start By Master
7
8
0
4
7
8
1
0
0
1
A2
A1
A0
R/W
0
Ack by 784R
0
0
0
0
0
0
D1
D0
Ack by 784R
Frame 1 Serial Bus Address Byte
Frame 2 Pointer Byte
0 SCL (Cont...) SDA (Cont...) 0 0 0 D4 D3 D2 D1
7
8
D0
Ack by 784R Stop by Master
Frame 3 Configuration Data Byte
Figure 8. Configuration Register Write
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
(f) Temperature TOS and THYST write
0 SCL SDA
Start By Master
7
8
0
4
7
8
1
0
0
1
A2
A1
A0
R/W
Ack by 784R
0
0
0
0
0
0
D1
D0
Ack by 784R
Frame 1 Serial Bus Address Byte
Frame 2 Pointer Byte
0 SCL (Cont...) SDA (Cont...) D7 D6 D5 D4 D3 D2 D1
7
8
0
7
8
D0
Ack by 784R
D7
D6
D5
D4
D3
D2
D1
D0
Ack by 784R Stop by Master
Frame 3 MSB Data Byte
Frame 4 LSB Data Byte
Figure 9. Configuration Register Write
6.3
Analog Inputs
The maximum input voltage of the analog pin is 4.096V because the 8-bit ADC has a 16mv LSB. Really, the application of the PC monitoring would most often be connected to power suppliers. The CPU V-core voltage and +3.3V voltage can directly connected to these analog inputs. The 5VSB and battery inputs should be reduced a factor with external resistors so as to obtain the input range. As Figure 10 shows.
VIN1(VCORE) VIN2(+3.3V) Positive Inputs 10V(Battery DC) VCC R1 232K, 1%
Pin 16 Pin 14 Pin 20 VIN3(VBAT) Pin 13 R2 99K, 1% 8-bit ADC with 16mV LSB
R Typical Thermister Connection
10K, 1% CPUT
VREF
Pin 17 Pin 19
R THM **The connections of CPUT2 is same as CPUT1 10K, 25 C
Figure.
10.
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
6.3.1
Monitor over 4.096V voltage:
The input voltage VIN3 can be expressed as following equation.
VIN 3 = V BAT - DC x
R2 R1 + R2
The value of R1 and R2 can be selected to 232K Ohms and 99K Ohms, respectively, when the input voltage VBAT-DC is 10V. The node voltage of VIN3 can be subject to less than 4.096V for the maximum input range of the 8-bit ADC. The pin 24 is connected to the power supply VCC with +5V. There are two functions in this pin with 5V. The first function is to supply internal analog power in the W83L784R and the second function is that this voltage with 5V is connected to internal serial resistors to monitor the +5V voltage. The values of two serial resistors are 34K ohms and 50K ohms so that input voltage to ADC is 2.98V which is less than 4.096V of ADC maximum input voltage. The express equation can represent as follows.
Vin = VCC x
50 K 2.98V 50 K + 34 K
where VCC is set to 5V
6.3.2
Power good for 3V and 5V
On power up, once VCC (5V) reaches 1V, RESET# will be logic low. As 3V and VCC (5V) rise, RESET# remains asserted. If 3V and VCC (5V) both exceed the reset threshold, RESET becomes logic high after a time equal to the reset pulse width (tRST, typically 200ms). (Figure 11) If a power fail or a brownout happens (i.e. 3V or VCC (5V) drops below the threshold), RESET# output is asserted. As long as the 3V and VCC (5V) remain below the reset threshold, RESET# output remains asserted. Therefore, a brownout condition that interrupts a previously initiated reset pulse causes an additional 200ms delay from the time the latest interruption occurred. On power-on, once 3Vor VCC (5V) drops below the reset threshold, RESET# are guaranteed to be asserted for VCC 1V.
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
3.3V 4 3 2 1 0 VCC V RS
T
V RS
T
V RS
T
The time of voltage over 4V is less than tRST
VCC 5 4 3 2 1 0 RESET 5
V RS
T
5 4 3 2 1 0 5 RESET 0 V RST V RST V RST
tRST 0
tRST
tRST
Figure 11
6.3.3
Battery Fault Alarm
W83L784R/G provides a good protection for DC battery. Set VIN3 to monitor DC battery voltage and enable VBAT fault function. When VIN3 (pin13) voltage exceeds high or low limit value, pin BATFAULT# will be asserted.
6.4
Temperature Measurement Machine
The temperature data format is 8-bit two-complement for internal sensor and 9-bit two -complement for sensor CPUT1 and CPUT2. The 8-bit temperature data can be obtained by reading the CR [27h]. The 9-bit temperature data (CPUT1 and CPUT2) can be obtained by reading CR [00h] of its serial bus address. The format of the temperature data is show in Table 1. Table 1
TEMPERATURE 8-BIT DIGITAL OUTPUT 8-BIT BINARY 8-BIT HEX 9-BIT DIGITAL OUTPUT 9-BIT BINARY 9-BIT HEX
+125C +25C +1C +0.5C +0C -0.5C -1C -25C -55C
0111,1101 0001,1001 0000,0001 0000,0000 1111,1111 1110,0111 1100,1001
7Dh 19h 01h 00h FFh E7h C9h
0,1111,1010 0,0011,0010 0,0000,0010 0,0000,0001 0,0000,0000 1,1111,1111 1,1111,1110 1,1100,1110 1,1001,0010
0FAh 032h 002h 001h 000h 1FFh 1FFh 1CEh 192h
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
6.4.1 Monitor temperature from thermistor:
The W83L784R/G can connect three thermistors to measure three different envirment temperature. The specification of thermistor should be considered to (1) value is 3435K, (2) resistor value is 10K ohms at 25C. In the Figure 10, the themistor is connected by a serial resistor with 10K Ohms, and then connect to VREF (pin 17).
6.4.2
Monitor temperature from Pentium IITM thermal diode or bipolar transistor 2N3904
The W83L784R/G can alternate the thermistor to Pentium IITM (Deschutes) thermal diode interface or transistor 2N3904 and the circuit connection is shown as Figure 12. The pin of Pentium IITM D- is connected to power supply ground (GND) and the pin D+ is connected to pin PIIx in the W83L784R/G. The resistor R=30K ohms should be connected to VREF to supply the diode bias current and the bypass capacitor C=3300pF should be added to filter the high frequency noise. The transistor 2N3904 should be connected to a form with a diode, that is, the Base (B) and Collector (C) in the 2N3904 should be tied together to act as a thermal diode.
VREF R=30K, 1%
Bipolar Transistor Temperature Sensor
PIITDx C=3300pF
B
C 2N3904 E R=30K, 1%
W83L784R
OR
Pentium II CPU Therminal Diode D+ C=3300pF D-
PIITDx
Figure 12
6.4.3
Over Temperature
W83L784R/G provides two external thermal sensors to detect temperature. When detected temperature exceeds the over-temperature value, pin OVT# will be asserted until the temperature goes below the hysteresis temperature. Pin OVT# has 3 operating modes. 6.4.3.1. ACPI Mode At this mode, temperature exceeding one level of temperature separation, starting from 0 degree, causes the OVT# output activated. OVT# will be activated again once temperature exceeding the next level. OVT# output will act the same manner when temperature goes down. (Figure 13) The
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
granularity of temperature separation between each OVT# output signal can be programmed at Bank0 CR [4Fh]. The priority of this mode is higher than Comparator mode and Interrupt mode.
('C) 100 90 80 70 60 50 40 30 20 10 0 OVT#
Current Temperature
Figure 13 6.4.3.2. Comparator Mode At this mode, temperature exceeding TO causes the OVT# output activated until the temperature is less than THYST. (Figure 14) 6.4.3.3. Interrupt Mode At this mode, temperature exceeding TO causes the OVT# output activated indefinitely until reset by reading CPUT1 or CPUT2 registers. Temperature exceeding TO, then OVT# asserted, and then temperature going below THYST will also cause the OVT# activated indefinitely until reset by reading temperature sensor2 or sensor 3 registers. Once the OVT# is activated by exceeding TO, then reset, if the temperature remains above THYST, the OVT# will not be activated again.( Figure 14)
To
T HYST (Comparator Mode; default) OVT# (Interrupt Mode) OVT#
* * * *
*Interrupt Reset when CPUT1/CPUT2 is read
Figure 14
6.5
FAN Speed Count and FAN Speed Control
Publication Release Date: Jan. 2005 Revision 1.1
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W83L784R/ W83L784G
6.5.1 Fan speed count
Inputs are provides for signals from fans equipped with tachometer outputs. The level of these signals should be set to TTL level, and maximum input voltage can not be over +5.5V. If the input signals from the tachometer outputs are over the VCC, the external trimming circuit should be added to reduce the voltage to obtain the input specification. The normal circuit and trimming circuits are shown as Figure 15. Determine the fan counter according to:
135 x 106 . Count = RPM x Divisor
In other words, the fan speed counter has been read from register CR28 or CR29 or CR2A, the fan speed can be evaluated by the following equation.
RPM =
135 x 10 6 . Count x Divisor
The default divisor is 2 and defined at CR49.bit0~2, bit4~6 which are three bits for divisor. That provides very low speed fan counter such as power supply fan. The followed table is an example for the relation of divisor, PRM, and count. Table 2
DIVISOR NOMINAL PRM TIME PER REVOLUTION COUNTS 70% RPM TIME FOR 70%
1 2 (default) 4 8 16 32 64 128
8800 4400 2200 1100 550 275 137 68
6.82 ms 13.64 ms 27.27 ms 54.54 ms 109.08 ms 218.16 ms 436.32 ms 872.64 ms
153 153 153 153 153 153 153 153
6160 3080 1540 770 385 192 96 48
9.74 ms 19.48 ms 38.96 ms 77.92 ms 155.84 ms 311.68 ms 623.36 ms 1246.72 ms
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
+5V +5V Pull-up resister 4.7K Ohms +5V Pull-up resister 4.7K Ohms
diode +5V FAN Out GND
diode +5V
Fan Input
2K
Pin 1 / 2
FAN Out GND
Fan Input
Pin 1 / 2
FAN Connector
W83L784 R
FAN Connector
10K
W83L784R
Figure 15-1. Fan with Tach Pull-Up to +5V
Figure 15-2. Fan with Tach Pull-Up to +5V, or Totem-Pole Output and Register Attenuator
+5V
+5V
diode +5V FAN Out GND
Pull-up resister > 1K +5V Fan Input 3.9V Zener Pin 1 / 2 FAN Out
diode
Pull-up resister < 1K or totem-pole output
Fan Input > 1K
Pin 1 / 2
GND
FAN Connector
W83L784 R
3.9V Zener
FAN Connector Figure 15-4. Fan with Tach Pull-Up to +5V, or Totem-Pole Putput and Zener Clamp
W83L784R
Figure 15-3. Fan with Tach Pull-Up to +5V and Zener Clamp
6.5.2
Fan speed control
The W83L784R/G provides four sets for fan PWM speed control. The duty cycle of PWM can be programmed by an 8-bit register which are defined in the Bank0 CR81h and CR83h. The default duty cycle is set to 100%, that is, the default 8-bit registers is set to FFh. The expression of duty can be represented as follows.
Duty - cycle(%) =
Programmed 8 - bit Register Value x 100% 255
+5V
R1 R2 G D NMOS S + C FAN PNP Transistor
PWM Clock Input
Figure 16 Publication Release Date: Jan. 2005 Revision 1.1
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W83L784R/ W83L784G
6.5.3 Smart Fan Control
Smart Fan Control provides two mechanisms. One is Thermal Cruise mode and the other is Fan Speed Cruise mode. 6.5.3.1. Thermal Cruise mode At this mode, W83L784R/G provides the Smart Fan system which can control the fan speed automatically depend on current temperature to keep it with in a specific range. At first a wanted temperature and interval must be set (ex. 55 C 3 C) by BIOS, as long as the current temperature remains below the setting value, the fan will be off. Once the temperature exceeds the setting high limit temperature (58C), the fan will be turned on with a specific speed set by BIOS (ex: 80% duty cycle) and automatically controlled its PWM duty cycle with the temperature varying. Three conditions may occur: (1) If the temperature still exceeds the high limit (ex: 58C), PWM duty cycle will increase slowly. If the fan has been operating in its fully speed but the temperature still exceeds the high limit (ex: 58C), a warning message or a fan_fault signal(pin5) will be issued to protect the system. (2) If the temperature goes below the high limit (ex: 58C), but above the low limit (ex: 52C), the fan speed will be fixed at the current speed because the temperature is in the target area (ex: 52 C ~ 58C). (3) If the temperature goes below the low limit (ex: 52C), PWM duty cycle will decrease slowly to 0 or a preset value until the temperature exceeds the low limit. Figure 17 gives an illustration for Thermal Cruise Mode.
A 58C 55C 52C 100 50 0
Fan Start = 20%
B
C
D
PWM Duty Cycle
Figure 17-1
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
D
A 58C 55C 52C 100 50 0
B
C
PWM Duty Cycle
Fan Start = 20%
Fan Stop = 10%
Fan Start = 20%
Figure 17-2 6.5.3.2. Fan Speed Cruise mode At this mode, W83L784R/G provides the Smart Fan system which can control the fan speed automatically depend on current fan speed to keep it with in a specific range. A wanted fan speed count and interval must be set (ex. 160 10) by BIOS. As long as the fan speed count is the specific range, PWM duty will keep the current value. If current fan speed count is higher than the high limit (ex. 160+10), PWM duty will be increased to keep the count less than the high limit. Otherwise, if current fan speed is less than the low limit (ex. 160-10), PWM duty will be decreased to keep the count higher than the low limit. See Figure 18 example.
Count 170 160 150 100 50 0 A C
PWM Duty Cycle
Figure 18 Of course, Smart Fan control system can be disabled and the fan speed control algorithm can be programmed by BIOS or application software.
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
6.5.4 Fan Fault Alarm
W83L784R/G can monitor fan speed by detecting fan speed counter value. When fan speed count is higher than high limit count value (CR58h) or less than low limit count value (CR59h), pin FANFAULT# is asserted.
6.6
6.6.1
SMI#
Temperature
Pin SMI# for temperature has 3 modes. 6.6.1.1. Comparator Interrupt Mode Temperature exceeding TO causes an interrupt and this interrupt will be reset by reading all the Interrupt Status Registers. Once an interrupt event has occurred by exceeding TO, then reset, if the temperature remains above the THYST, the interrupt will occur again when the next conversion has completed. If an interrupt event has occurred by exceeding TO and not reset, the interrupts will not occur again. The interrupts will continue to occur in this manner until the temperature goes below THYST. (Figure 19-1) 6.6.1.2. Two-Times Interrupt Mode Temperature exceeding TO causes an interrupt and then temperature going below THYST will also cause an interrupt if the previous interrupt has been reset by reading all the interrupt Status Register. Once an interrupt event has occurred by exceeding TO, then reset, if the temperature remains above the THYST, the interrupt will not occur. (Figure 19-2)
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
6.6.1.3. One-Time Interrupt Mode Temperature exceeding TO causes an interrupt and then temperature going below THYST will not cause an interrupt. Once an interrupt event has occurred by exceeding TO, then going below THYST, an interrupt will not occur again until the temperature exceeding TO. (Figure 19-3)
T OI
T OI
T HYST
T HYST
SMI#
*
*
*
*
*
SMI#
*
*
*
*Interrupt Reset when Interrupt Status Registers are read
Figure 19-1. Comparator Interrupt Mode
Figure 19-2. Two-Times Interrupt Mode
T OI
T HYST
SMI#
*
*
*Interrupt Reset when Interrupt Status Registers are read
Figure 19-3. One-Time Interrupt Mode
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
6.6.2
Voltage
SMI# interrupt for voltage is Two-Times Interrupt Mode. Voltage exceeding high limit or going below low limit will causes an interrupt if the previous interrupt has been reset by reading all the interrupt Status Register. (Figure 20-1)
6.6.3
Fan
SMI# interrupt for fan is Two-Times Interrupt Mode. Fan count exceeding the limit, or exceeding and then going below the limit (set at value ram index 3Bh and 3Ch) , will causes an interrupt if the previous interrupt has been reset by reading all the interrupt Status Register. (Figure 20-2)
High limit
Low limit
Fan Count limit
SMI#
*
*
*
*
SMI#
*
*
*Interrupt Reset when Interrupt Status Registers are read
Figure 20-1. Voltage SMI# Mode
Figure 20-2. Fan SMI# Mode
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
7. REGISTERS AND RAM
7.1
BIT
Configuration Register -- Index 40h
NAME READ/WRITE DESCRIPTION
Power on default [7:0] = 0000, 0001 b 7 INITIALIZATION Read/Write A one restores power on default value to all registers except the Serial Bus Address register. This bit clears itself since the power on default is zero. Reserved Disable Power OK Function. If this bit set to 1, the PWR_DN# (Pin 6) will keep logical high no mater what the pwoer VDD or +3.3V drop to the threshold voltage (4.0v and 2.6v, respectively). Reserved A one disables the SMI# outputs without affecting the contents of Interrupt Status Registers. The device will stop monitoring. It will resume upon clearing of this bit. A one enables startup of monitoring operation, a zero puts the part in standby mode. Note: The outputs of Interrupt pins will not be cleared if the user writes a zero to this location after an interrupt has occurred unlike "INT_Clear'' bit.
6-4 3
Reserved DIS_PWROK
Read/Write Read/Write
2 1
Reserved INT_ Clear
Reserved Read/Write
0
Start
Read/Write
7.2
BIT
Interrupt Status Register 1 -- Index 41h
NAME READ/WRITE DESCRIPTION
Power on default [7:0] = 0000, 0000 b 7 6 5 4 3 2 1 0 TEMP3 TEMP2 TEMP1 Reserved VCCIN 3VIN VBATIN VCOIN Read Only Read Only Read Only Reserved Read Only Read Only Read Only Read Only A one indicates a High or Low limit has been exceeded from CPUT2 sensor. A one indicates a High or Low limit has been exceeded from CPUT1 sensor. A one indicates a High or Low limit has been exceeded from W83L784R internal temperature sensor. Reserved A one indicates a High or Low limit has been exceeded. ( VCC, +5V) A one indicates a High or Low limit has been exceeded. (VIN2) A one indicates a High or Low limit has been exceeded.(VIN3 ) A one indicates a High or Low limit has been exceeded. (VIN1)
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
7.3
BIT
Interrupt Status Register 2 -- Index 42h
NAME READ/WRITE DESCRIPTION
Power on default [7:0] = 0000, 0000 b 7-4 3 Reserved TAR_T2 Read Only Read Only Read 0. CPUT2 Target Status. A one indicates CPUT2 temperature with Fan 2 full speed can not be in the specific range after 3 minutes. CPUT1 Target Status. A one indicates CPUT1 temperature with Fan 1 full speed can not be in the specific range after 3 minutes. A one indicates the fan count limit has been exceeded. A one indicates the fan count limit has been exceeded.
2
TAR_T1
Read Only
1 0
FAN2 FAN1
Read Only Read Only
7.4
BIT
SMI Mask Register 1 -- Index 43h
NAME
MSK_T3_SMI MSK_T2_SMI MSK_T1_SMI Reserved MSK_VCC_SMI MSK_3V_SMI MSK_VBAT_SM I MSK_VCO_SMI
Power on default <7:0> = 0000, 0000 b
READ/WRITE DESCRIPTION
7 6 5 4 3 2 1 0
Read/Write Read/Write Read/Write
Reserved
A one disables the corresponding interrupt status bit for
SMI interrupt.(CPUT2 target temperature)
A one disables the corresponding interrupt status bit for
SMI interrupt.(CPUT1 target temperature)
A one disables the corresponding interrupt status bit for
SMI interrupt. (internal thermal diode)
Reserved
Read/Write Read/Write Read/Write Read/Write
A one disables the corresponding interrupt status bit for
SMI interrupt. (VCC, +5V)
A one disables the corresponding interrupt status bit for
SMI interrupt. (Pin VIN2)
A one disables the corresponding interrupt status bit for
SMI interrupt.(Pin VIN3)
A one disables the corresponding interrupt status bit for
SMI interrupt.
(Pin VIN1)
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
7.5
BIT
SMIY Mask Register 2 -- Index 44h
NAME
Reserved MSK_TAR2_SMI MSK_TAR1_SMI MSK_FAN2_SMI MSK_FAN1_SMI
Power on default [7:0] = 0000, 0000 b
READ/WRITE DESCRIPTION
7-4 3 2 1 0
Read/Write Read/Write Read/Write Read/Write Read/Write
Reserved. A one disables the corresponding interrupt status bit for
SMI interrupt. (CPUT2 target temperature ) A one disables the corresponding interrupt status bit for SMI interrupt. (CPUT1 target temperature ) A one disables the corresponding interrupt status bit for SMI interrupt. (Fan 2 speed counter) A one disables the corresponding interrupt status bit for SMI interrupt. (Fan 1 speed counter)
7.6
BIT
Real Time Hardware Status Register I -- Index 45h
NAME READ/WRITE DESCRIPTION
Power on - [7:0] = 0000, 0000 b 7 TEMP3_STS Read Only Temperature sensor 3 (CPU T2) Status. Set 1, the voltage of temperature sensor is over the limit value. Set 0, the voltage of temperature sensor is in the limit range. Temperature sensor 2 (CPU T1) Status. Set 1, the voltage of temperature sensor is over the limit value. Set 0, the voltage of temperature sensor is in the limit range. Temperature sensor 1 (Internal Thermal Diode) Status. Set 1, the voltage of temperature sensor is over the limit value. Set 0, the voltage of temperature sensor is in the limit range. Reserved. +5V Voltage Status. Set 1, the voltage of +5V is over the limit value. Set 0, the voltage of +5V is in the limit range. +3.3V Voltage Status. Set 1, the voltage of +3.3V is over the limit value. Set 0, the voltage of +3.3V is in the limit range. VBAT (VIN3) Voltage Status. Set 1, the voltage of VBAT (VIN3) is over the limit value. Set 0, the voltage of VBAT (VIN3) is in the limit range. VCORE A Voltage Status. Set 1, the voltage of VCORE A is over the limit value. Set 0, the voltage of VCORE A is in the limit range.
6
TEMP2_STS
Read Only
5
TEMP1_STS
Read Only
4 3
Reserved VCCIN_STS
Reserved Read Only
2
3V_STS
Read Only
1
VBAT_STS
Read Only
0
VCO_STS
Read Only
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
7.7
Bit
Real Time Hardware Status Register II -- Index 46h
Name Read/Write Description
Power on default [7:0] = 0000-0000 b 7-4 3 Reserved TART2_STS Read Only Read Only Read 0. CPUT2 Target Status Set 1, when CPUT2 target temperature with Fan 2 full speed can not be in the range after 3 minutes. Set 0, the temperature or speed is in the specific range. CPUT1 Target Status Set 1, when CPUT1 target temperature with Fan 1 full speed can not be in the range after 3 minutes. Set 0, the temperature or speed is in the specific range. FAN 2 Status Set 1, the fan speed counter is over the limit value. Set 0, the fan speed counter is in the limit range. FAN 1 Status Set 1, the fan speed counter is over the limit value. Set 0, the fan speed counter is in the limit range.
2
TART1_STS
Read Only
1
FAN2_STS
Read Only
0
FAN1_STS
Read Only
7.8 7.9
BIT
Reserved Register -- Index 47h- 48h Fan Divisor Register -- Index 49h
NAME READ/WRITE DESCRIPTION
Reserved Power on default [7:4] = 0001, 0001 b 7 6-4 Reserved F2_SP_CRTL[2:0] Read/write Read/Write Reserved. FAN2 Speed Control. 000 - divide by 1; 001 - divide by 2; 010 - divide by 4; 011 - divide by 8. 100 - divide by 16. 101 - divide by 32. 110 - divide by 64. 111 - divide by 128. Reserved. FAN1 Speed Control. 000 - divide by 1; 001 - divide by 2; 010 - divide by 4; 011 - divide by 8. 100 - divide by 16. 101 - divide by 32. 110 - divide by 64. 111 - divide by 128.
3 2-0
Reserved F1_SP_CTRL[2:0]
Read/write Read/Write
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
7.10 Serial Bus Address (for Voltage, Fan, and internal temperature) Register Address 4Ah
Power on default [7:0] = 0010, 1101 b
BIT NAME READ/WRITE DESCRIPTION
7 6-0
Reserved Serial Bus Address
Read Only Read/Write Serial Bus address [6:0].
7.11 CPUT1 Temperature and CPUT2 Temperature Serial Bus Address Register Index 4Bh
Power on default [7:0] = 0000, 0001 b
BIT NAME READ/WRITE DESCRIPTION
7
DIS_CPUT2
Read/Write
Disable CPUT2 Temperature Function. Set to 1, disable temperature 3 sensor and can not access any data from Temperature Sensor 3. Note that the relative functions of Status, and SMI# will be disable. Temperature 3 Serial Bus Address. The serial bus address is 1001xxx. Where xxx are defined in these bits. Disable CPUT1 Temperature Function. Set to 1, disable temperature Sensor and can not access any data from Temperature Sensor 2. Note that the relative functions of Status, and SMI# will be disable. Temperature 2 Serial Bus Address. The serial bus address is 1001xxx. Where xxx are defined in these bits.
6-4
I2CADDR3[2:0]
Read/Write
3
DIS_CPUT1
Read/write
2-0
I2CADDR2[2:0]
Read/Write
7.12 Winbond Vendor ID (Low Byte) -- Index 4Ch (Auto Increase)
Power-on default [7:0] = 1010, 0011 b (A3h)
Bit Name Read/Write Description
7:0
VIDL[7:0]
Read Only
Vendor ID Low Byte. Default A3h.
7.13 Winbond Vendor ID (High Byte) -- Index 4Dh (No Auto Increase)
Power-on default [7:0] = 0101, 1100 b (5Ch)
Bit Name Read/Write Description
7:0
VIDH[7:0]
Read Only
Vendor ID High Byte. Default 5Ch
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
7.14 Chip ID -- Index 4Eh
Power on default [7:0] = 0101, 0000 b
BIT NAME READ/WRITE DESCRIPTION
7-0
CHIPID[7:0]
Read Only
Winbond Chip ID number. Read this register will return 50h for W83L784R.
7.15 ACPI Temperature Increment Register -- Index 4Fh
Power on deafult [7:0] = 0000, 0101 b
BIT NAME READ/WRITE DESCRIPTION
7 6-0
Reserved DIFFREG[6:0]
Read/Write Read/Write
Reserved. ACPI Temperature Increment Register. If set to this register to non-zero value, the OVT# signal will be activated at pointer of the temperature of times of DIFFREG (i.e. DIFFREG*n, where n is non-zero integer). The default value is 5 degree C.
7.16 OVT# Property Select -- Index 50h
Power on default [7:0] = 0000, 0000 b
BIT NAME READ/WRITE DESCRIPTION
7-6 5-4
Reserved OVT_MD[1:0]
Read/Write Read/Write
Reserved. OVT# Mode Select. There are three OVT# signal output type. <00> - Comparator Mode: (Default) Temperature exceeding TO causes the OVT# output activated until the temperature is less than THYST. <01> - Interrupt Mode: Setting temperature exceeding TO causes the OVT# output activated indefinitely until reset reading temperature sensor 1/2/3 registers. Temperature exceeding TO, then OVT# reset, and then temperature going below THYST will also cause the OVT# activated definitely until reset by reading temperature sensor 1/2/3. Once the OVT# will not be activated by exceeding TO, and then reset, if the temperature remains above THYST, the OVT# will not be activated again. <10> - ACPI Mode: If set to 1 then enable ACPI OVT# output. Which is always send an OVT# signal when the temperature over the ACPI temperature increment value defined at Index 4Fh.
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W83L784R/ W83L784G
OVT# Property Select -- Index 50h, continued.
BIT
NAME
READ/WRITE
DESCRIPTION
3
EN_OVT3
Read/Write
2
EN_OVT2
Read/Write
1
EN_OVT1
Read/Write
0
OVTPOL
Read/Write
Enable CPUT2 temperature sensor over-temperature (OVT) output if set to 1. Default 0, disable CPUT2 OVT output through pin OVT#. The pin OVT# is wire OR with OVT1 and OVT2. Enable CPUT1 temperature sensor over-temperature (OVT) output if set to 1. Default 0, disable CPUT1 OVT output through pin OVT#. The pin OVT# is wire OR with OVT1 and OVT3. Enable internal temperature sensor over-temperature (OVT) output if set to 1. Default 0, disable OVT1 output through pin OVT#. The pin OVT# is wire OR with OVT2 and OVT3. Over-Temperature Polarity. Write 1, OVT# active high. Write 0, OVT# active low. Default 0.
7.17 SMI# Property Select -- Index 51h
Power on - <7:0> --0000, 0100 b
BIT NAME READ/WRITE DESCRIPTION
7-4 3-2
Reserved TEMP_SMI_ MD[1:0]
Read/Write Read/Write
Reserved. Temperature SMI Mode Select. <00> - Comparator Interrupt Mode: Temperature 1/2/3 exceeds TO (Over-temperature) limit causes and interrupt and this interrupt will be reset by reading all the Interrupt Stauts. <01> - Two Time Interrupt Mode:(Default) This bit use in temperature sensor 1/2/3 interrupt mode with hysteresis type. Temperature exceeding TO, causes an interrupt and then temperature going below THYST will also cause an interrupt if the previous interrupt has been reset by reading all the interrupt Status Register. Once an interrupt event has occurred by exceeding TO, then reset, if the temperature remains above the THYST. <10> - One Time Interrupt Mode: This bit use in temperature sensor 1/2/3 interrupt mode with hysteresis type. Temperature exceeding TO (Over-temperature, defined in Bank 1/2) causes an interrupt and then temperature going below THYST (Hysteresis temperature, defined in Bank 1/2) will not cause an interrupt. Once an interrupt event has occurred by exceeding TO, then going below THYST, and interrupt will not occur again until the temperature exceeding TO.
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
SMI# Property Select -- Index 51h, continued.
BIT
NAME
READ/WRITE
DESCRIPTION
1 0
EN_SMI# SMIPOL
Read/Write Read/Write
Enable SMI# Output. A one enables the SMI# Interrupt output. SMI# Polarity. Write 1, SMI# active high. Write 0, SMI# active low. Default 0.
7.18 FANIN1/GPO1, FANIN2/GPO2 and BEEP/GPO3 Control Register -- Index 52h
Power on default [7:0] = 0000, 0000 b
BIT NAME READ/WRITE DESCRIPTION
7
GPO4_VAL
Read/Write
6
EN_GPO4
Read/Wite
5
GPO3_VAL
Read/Write
4
EN_GPO3
Read/Wite
3
GPO2_VAL
Read/Write
2
EN_GPO2
Read/Write
1
GPO1_VAL
Read/Write
GPO4 Output Value. GPO4 output value if EN_GPO4 is set to 1. Write 1, then pin 11 (GPO4) always generate logic high signal. Write 0, pin 11 (GPO4) always generates logic low signal. This bit default 0. Enable GPO4 Function. Set to 0 (default), pin 11 (BATFAULT#/GPO3) acts as BATFAULT# whcih is battery voltage out of the limit value. Set to 1, this pin 11 acts as GPO4 control function and the output value of GPO4 is programmed by this register bit 7. GPO3 Output Value. GPO3 output value if EN_GPO3 is set to 1. Write 1, then pin 5 (GPO3) always generate logic high signal. Write 0, pin 5 (GPO3) always generates logic low signal. This bit default 0. Enable GPO3 Function. Set to 0 (default), pin 5 (FANFAULT#/GPO3) acts as FAN_FAULT whcih is fan count out of the limit value. Set to 1, this pin 5 acts as GPO3 control function and the output value of GPO3 is programmed by this register bit 5. GPO2 Output Value. GPO2 output value if EN_GPO2 is set to 1. Write 1, then pin 2 (GPO2) always generate logic high signal. Write 0, pin 2 (GPO2) always generates logic low signal. This bit default 0. Enable GPO2 Function. Which enable multiple function pin 2, named FANIN2/GPO2, GPO2 function. Set to 0 (default), pin 2 (FANIN2/GPO2) acts as FANIN2 whcih is fan clock input. Set to 1, this pin 2 acts as GPO2 control function and the output value of GPO2 is programmed by this register bit 3. This output pin GPO2 can connect to power PMOS gate to control FAN ON/OFF. GPO1 Output Value. GPO1 output value if EN_GPO1 is set to 1. Write 1, then pin 1 (GPO1) always generate logic high signal. Write 0, pin 1 (GPO1) always generates logic low signal. This bit default 0.
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
FANIN1/GPO1, FANIN2/GPO2 and BEEP/GPO3 Control Register -- Index 52h,,continued.
BIT
NAME
READ/WRITE
DESCRIPTION
0
EN_GPO1
Read/Write
Enable GPO1 Function. Which enable multiple function pin 1, named FANIN1/GPO1, GPO1 function. Set to 0 (default), pin 1 (FANIN1/GPO1) acts as FANIN1 whcih is fan clock input. Set to 1, this pin 1 acts as GPO1 control function and the output value of GPO1 is programmed by this register bit 1. This output pin GPO2 can connect to power PMOS gate to control FAN ON/OFF.
7.19 CPUT1/CPUT2 Thermal Sensor Type Register -- Index 53h
Power on default [7:0] = 0000-0000 b
BIT NAME READ/WRITE DESCRIPTION
7-4 3-2
Reserved T3_TYPE[1:0]
Read/Write Read/Write
Reserved. Temperature sensor 3 (CPU T2) type. 0x - Thermistor (10K @ 25 degree C, B=3435). 10 - 2N3904 transistor. 11 - Intel thermal diode.
1-0
T2_TYPE[1:0]
Read/Write
Temperature sensor 2 (CPU T1) type. 0x - Thermistor (10K @ 25 degree C, B=3435) 10 - 2N3904 transistor 11 - Intel thermal diode.
7.20 Misc Control Register -- Index 54h
Power on default [7:0] = 0000-0000 b
BIT NAME READ/WRITE DESCRIPTION
7-6 5
Reserved PWM2_LM_Enable
Read/Write Read/Write
Reserved. Set 1, PWMOUT2 duty cycle will decrease to CR [89h] when temperature goes below target range. Set 0, PWMOUT2 duty cycle will decrease to 0 when temperature grows below target range.
4
PWM1_LM_Enable
Read/Write
Set 1, PWMOUT1 duty cycle will decrease to CR [88h] when temperature goes below target range. Set 0, PWMOUT1 duty cycle will decrease to 0 when temperature grows below target range.
3 2
Reserved SWP_FAN2_PWM
Reserved Read/Write
Reserved Swap CPUT2 PWM to internal temperature sensor PWM Control. Write this bit set to 1, FAN2 PWM PWM control will refer to internal temperature sensor.
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
Misc Control Register -- Index 54h, continued.
BIT
NAME
READ/WRITE
DESCRIPTION
1 0
Reserved EN_VBAT_MNT
Reserved ReadWrite
Reserved Write 1, enable battery voltage monitor. Write 0, disable battery voltage monitor. (VIN4/VBAT)
7.21 Fan/VBAT Fault Control Register -- Index 55h
Power on default [7:0] = 0000-0000 b
BIT NAME READ/WRITE DESCRIPTION
7-3 2
Reserved EN_FAN2_FAULT
Read/Write Read/Write
Reserved. Enable Fan 2 Fault Function. When Fan 2 is out of the Fan Fault Limit value (defined Index 58 and 59), the Pin 5 will go to low level. This function is wire-or with Fan 1 fault if fan 1 fualt function is enable. Enable Fan1 Fault Function. When Fan 1 is out of the Fan Fault Limit value (defined Index 56 and 57), the Pin 5 will go to low level. This function is wire-or with Fan 2 fault if fan 2 fualt function is enable. Enable VBAT Fault Function. Set to 1, enable battery fault function. Set to 0, disable this function. When battery voltage is out of the fault limit value (defined at Index 5A and 5B), the Pin 11 (BATFAULT#) will be asserted.
1
EN_FAN1_FAULT
Read/Write
0
EN_VBAT_FAULT
Read/Write
7.22 Fan 1 Fault High Limit Count -- Index 56h
Power on default [7:0] = 1111-1111 b
BIT NAME READ/WRITE DESCRIPTION
7-0
FAN_HI_LM
Read/Write
Fan High Count Limit Value.
7.23 Fan 2 Fault Low Limit Count -- Index 57h
Power on default [7:0] = 0000-0000 b
BIT NAME READ/WRITE DESCRIPTION
7-0
FAN_LOW_LM
Read/Write
Fan Low Count Limit Value.
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
7.24 Fan 2 Fault High Limit Count -- Index 58h
Power on default [7:0] = 1111-1111 b
Bit Name Read/Write Description
7-0
FAN_HI_LM
Read/Write
Fan High Count Limit Value.
7.25 Fan 1 Fault Low Limit Count -- Index 59h
Power on default [7:0] = 0000-0000 b
Bit Name Read/Write Description
7-0
FAN_LOW_LM
Read/Write
Fan Low Count Limit Value.
7.26 VBAT Fault High Limit Value -- Index 5Ah
Power on default [7:0] = 1111-1111 b
BIT NAME READ/WRITE DESCRIPTION
7-0
VBAT_HI_LM
Read/Write
VBAT High Limit Value.
7.27 VBAT Fault Low Limit Value -- Index 5Bh
Power on default [7:0] = 0000-0000 b
Bit Name Read/Write Description
7-0
VBAT_LOW_LM
Read/Write
VBAT Low Limit Value.
7.28 FAN 1 Pre-Scale Register -- Index 80h
Power on default [7:0] = 0000-0001 b
BIT NAME READ/WRITE DESCRIPTION
7
PWM_CLK_SEL1
Read/Write
6-0
PRE_SCALE1[6:0]
Read/Write
PWM Input Clock Select. This bit select Fan 1 input clock to pre-scale divider. 0: 1 MHz 1: 125 KHz Fan 1 Input Clock Pre-Scale. The divider of input clock is the number defined by pre-scale. Thus, writing 0 transfers the input clock directly to counter. The maximum divider is 128 (7Fh). 00h : divider is 1 01h : divider is 2 02h : divider is 3 : :
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
7.29 FAN 1 Duty Cycle Select Register -- 81h (Bank 0)
Power on default [7:0] 1111, 1111 b
BIT NAME READ/WRITE DESCRIPTION
7-0
F1_DC[7:0]
Read/Write
Fan 1 Duty Cycle. This 8-bit register determines the number of input clock cycles, out of 256-cycle period, during which the PWM output is high. During smart fan 1 control mode, read this register will return smart fan duty cycle. 00h: PWM output is always logical Low. FFh: PWM output is always logical High. XXh: PWM output logical High percentage is (XX/256*100%) during one cycle.
7.30 FAN 2 Pre-Scale Register -- Index 82h
Power on default [7:0] = 0000, 0001 b
BIT NAME READ/WRITE DESCRIPTION
7
PWM_CLK_SEL2
Read/Write
6-0
PRE_SCALE2[6:0]
Read/Write
PWM 2 Input Clock Select. This bit select Fan 2 input clock to pre-scale divider. 0: 1 MHz 1: 125 KHz Fan 2 Input Clock Pre-Scale. The divider of input clock is the number defined by pre-scale. Thus, writing 0 transfers the input clock directly to counter. The maximum divider is 128 (7Fh). 00h : divider is 1 01h : divider is 2 02h : divider is 3 : :
7.31 FAN2 Duty Cycle Select Register -- Index 83h
Power on default [7:0] = 1111, 1111 b
BIT NAME READ/WRITE DESCRIPTION
7-0
F2_DC[7:0]
Read/Write
Fan 2 Duty Cycle. This 8-bit register determines the number of input clock cycles, out of 256-cycle period, during which the PWM output is high. During smart fan 2 control mode, read this register will return smart fan duty cycle. 00h: PWM output is always logical Low. FFh: PWM output is always logical High. XXh: PWM output logical High percentage is XX/256*100% during one cycle. Publication Release Date: Jan. 2005 Revision 1.1
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W83L784R/ W83L784G
7.32 FAN Configuration Register -- Index 84h
Power on default [7:0] = 0000, 0000 b
BIT NAME READ/WRITE DESCRIPTION
7-2 5-4
Reserved FAN2_MODE
Read/Write Read/Write
Reserved FAN 2 PWM Control Mode. 00 - Manual PWM Control Mode. (Default) 01 - Thermal Cruise mode. 10 - Fan Speed Cruise Mode. 11 - Reserved.
3-2
FAN1_MODE
Read/Write
FAN 1 PWM Control Mode. 00 - Manual PWM Control Mode. (Default) 01 - Thermal Cruise mode. 10 - Fan Speed Cruise Mode. 11 - Reserved.
1
FAN2_OB
Read/Write
Enable Fan 2 as Output Buffer. Set to 1, FANPWM1 can drive logical high or logical low. Default Pin 4 (FANPWM) is open-drain. Enable Fan 1 as Output Buffer. Set to 1, FANPWM1 can drive logical high or logical low. Default Pin 3 (FANPWM) is open-drain.
0
FAN1_OB
Read/Write
7.33 CPUT1 Target Temperature Register/ Fan 1 Target Speed Register -- Index 85h
Power on default [7:0] = 0000, 0000 b CPUT1 target temperature register for Thermal Cruise mode.
BIT NAME READ/WRITE DESCRIPTION
7 6-0
Reserved TEMP_TAR_T1[6:0]
Read/Write Read/Write
Reserved. CPUT1 Target Temperature. Only for Thermal Cruise Mode while CR84h bit3-2 is 01.
Fan 1 target speed register for Fan Speed Cruise mode.
BIT NAME READ/WRITE DESCRIPTION
7-0
SPD_TAR_FAN1 [7:0]
Read/Write
Fan 1 Target Speed Control. Only for Fan Speed Cruise Mode while CR84h bit3-2 is 10.
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
7.34 CPUT2 Target Temperature Register/ Fan 2 Target Speed Register -- Index 86h
Power on - [7:0] = 0000, 0000 b CPUT2 target temperature register for Thermal Cruise mode.
BIT NAME READ/WRITE DESCRIPTION
7 6-0
Reserved TEMP_TAR_T2[6:0]
Read/Write Read/Write
Reserved. CPUT1 Target Temperature. Only for Thermal Cruise Mode while CR84h bit5-4 is 01.
Fan 2 target speed register for Fan Speed Cruise mode.
BIT NAME READ/WRITE DESCRIPTION
7-0
SPD_TAR_FAN 2[7:0]
Read/Write
Fan 1 Target Speed Control. Only for Fan Speed Cruise Mode while CR84h bit5-4 is 10.
7.35 Tolerance of Target Temperature or Target Speed Register -- Index 87h
Power on default [7:0] = 0001, 0001 b Tolerance of CPUT1/CPUT2 target temperature register.
BIT NAME READ/WRITE DESCRIPTION
7-4 3-0
TOL_T2[3:0] TOL_T1[3:0]
Read/Write Read/Write
Tolerance of Fan 2 Target Temperature. Only for Thermal Cruise mode. Tolerance of Fan 1 Target Temperature. Only for Thermal Cruise mode.
Tolerance of Fan 1/2 target speed register.
BIT NAME READ/WRITE DESCRIPTION
7-4 3-0
TOL_FS2[3:0] TOL_FS1[3:0]
Read/Write Read/Write
Tolerance of Fan 2 Target Speed Count. Only for Fan Speed Cruise mode. Tolerance of Fan 1 Target Speed Count. Only for Fan Speed Cruise mode.
7.36 Fan 1 PWM Stop Duty Cycle Register -- Index 88h
Power on default [7:0] = 0000, 0001 b
BIT NAME READ/WRITE DESCRIPTION
7-0
STOP_DC1[7:0]
Read/Write
In Thermal Cruise mode, PWM duty will be 0 if it decreases to under this value. This register should be written a non-zero minimum PWM stop duty cycle.
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
7.37 Fan 2 PWM Stop Duty Cycle Register -- 89h (Bank 0)
Power on default [7:0] = 0000, 0001 b
BIT NAME READ/WRITE DESCRIPTION
7-0
STOP_DC2[7:0]
Read/Write
In Thermal Cruise mode, PWM duty will be 0 if it decreases to under this register value. This register should be written a non-zero minimum PWM stop duty cycle.
7.38 Fan 1 Start-up Duty Cycle Register -- Index 8Ah
Power on default [7:0] = 0000, 0001 b
BIT NAME READ/WRITE DESCRIPTION
7-0
START_DC1[7:0]
Read/Write
In Thermal Cruise mode, PWM duty will increase from 0 to this register value to provide a minimum duty cycle to turn on the fan. This register should be written a fan start-up duty cycle.
7.39 Fan 2 Start-up Duty Cycle Register -- Index 8Bh
Power on default [7:0] = 0000, 0001 b
BIT NAME READ/WRITE DESCRIPTION
7-0
START_DC2[7:0]
Read/Write
In Thermal Cruise mode, PWM duty will increase from 0 to this register value to provide a minimum duty cycle to turn on the fan. This register should be written a fan start-up duty cycle.
7.40 Fan 1 Stop Time Register -- Index 8Ch
Power on default [7:0] = 0011, 1100 b
BIT NAME READ/WRITE DESCRIPTION
7-0
STOP_TIME1[7:0]
Read/Write
In Thermal Cruise mode, this register determines the time of which PWM duty is from stop duty cycle to 0 duty cycle. The unit of this register is 0.1 second. The default value is 6 seconds.
7.41 Fan 2 Stop Time Register -- Index 8Dh
Power on default [7:0] = 0011, 1100 b
BIT NAME READ/WRITE DESCRIPTION
7-0
STOP_TIME2[7:0]
Read/Write
In Thermal Cruise mode, this register determines the time of which PWM duty is from stop duty cycle to 0 duty cycle. The unit of this register is 0.1 second. The default value is 6 seconds.
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
7.42 Fan Step down Time Register -- Index 8Eh
Power on default [7:0] = 0000, 1010 b
BIT NAME READ/WRITE DESCRIPTION
7-0
STEP_UP_T[7:0]
Read/Write
The time interval, which is 0.1 second unit, to decrease PWM duty in Smart Fan Control mode.
7.43 Fan Step up Time Register -- Index 8Fh
Power on default [7:0] = 0000, 1010 b
BIT NAME READ/WRITE DESCRIPTION
7-0
STEP_DOWN_T [7:0]
Read/Write
The time interval, which is 0.1 second unit, to increase PWM duty in Smart Fan Control mode.
7.44 Temperature Sensor 1 (Internal Thermal Diode) Offset Register -- Index 90h
Power-on default [7:0] = 0000, 0000 b
BIT NAME READ/WRITE DESCRIPTION
7-6 5-0
Reserved OFFSET1[5:0]
Read/Write Read/Write
Reserved. Temperature 1 base temperature. This value is added to monitor value, resulting in the current temperature. 01,1111 => +31 degree C 01,1110 => +30 degree C : 00,0001 => +1 degree C 00,0000 => +0 degree C 11,1111 => -1 degree C 11,1110 => -2 degree C : 10,0000 => -32 degree
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
7.45 Temperature Sensor 2 (CPU T1) Offset Register -- Index 91h
Power-on default [7:0] = 0000, 0000 b
BIT NAME READ/WRITE DESCRIPTION
7-6 5-0
Reserved OFFSET1[5:0]
Read/Write Read/Write
Reserved. Temperature 2 (CPUT1) base temperature. This value is added to monitor value, resulting in the current temperature. 01,1111 => +31 degree C 01,1110 => +30 degree C : 00,0001 => +1 degree C 00,0000 => +0 degree C 11,1111 => -1 degree C 11,1110 => -2 degree C : 10,0000 => -32 degree
7.46 Temperature Sensor 3 (CPU T2) Offset Register -- Index 92h
Power-on default [7:0] = 0000, 0000 b
BIT NAME READ/WRITE DESCRIPTION
7-6 5-0
Reserved OFFSET3[5:0]
Read/Write Read/Write
Reserved. Temperature 3 (CPU T2) base temperature. This value is added to monitor value, resulting in the current temperature. 01,1111 => +31 degree C 01,1110 => +30 degree C : 00,0001 => +1 degree C 00,0000 => +0 degree C 11,1111 => -1 degree C 11,1110 => -2 degree C : 10,0000 => -32 degree
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
8. VALUE RAM AND LIMIT VALUE
8.1 Value RAM -- Index 20h- 3Fh or 60h - 7Fh
INDEX A6-A0 DESCRIPTION INDEX A6-A0
20h 21h 22h 23h 24h 25h 26h 27h 28h
60h 61h 62h 63h 64h 65h 66h 67h 68h
29h
69h
2Ah 2Bh 2Ch 2Dh 2Eh 2Fh 30h 31h 32h 33h 34h 35h 36h 37h 38h 39h 3Ah 3Bh 3Ch 3Dh 3E- 3Fh
6Ah 6Bh 6Ch 6Dh 6Eh 6Fh 70h 71h 72h 73h 74h 75h 76h 77h 78h 79h 7Ah 7Bh 7Ch 7Dh 7E- 7Fh
Pin VIN1 reading (Vcore) Pin VIN3 reading (VBAT) Pin VIN2 reading (+3.3V) Pin VCC reading (VCC,+5V) Reserved Reserved Reserved Internal Temperature reading FAN1 reading Note: This location stores the number the internal clock per revolution. FAN2 reading Note: This location stores the number the internal clock per revolution. Reserved VIN1(Vcore) High Limit VIN1(Vcore) Low Limit VIN3 (VBAT) High Limit VIN3 (VBAT) Low Limit VIN2 (+3.3V) High Limit VIN2 (+3.3V) Low Limit VCC High Limit VCC Low Limit Reserved Reserved Reserved Reserved Reserved Reserved Over Temperature Limit (High) temperature Temperature Hysteresis Limit (Low) temperature FAN1 Fan Count Limit FAN2 Fan Count Limit. Reserved Reserved
of counts of
of counts of
of
internal
of internal
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
9. TEMPERATURE SENSOR 2 (CPU T1) REGISTERS
The address of I2C is defined in Bank0.Reg4B.
9.1
Temperature Sensor 2 Temperature Register -- Index 00h
NAME READ/WRITE DESCRIPTION
Read Only
BIT
15-7 6-0
TEMP2[8:0] Reserved
Read Only Read Only
Temperature bit [8:0] of sensor 2. (0.5 degree C precision) Read 0.
9.2
Temperature Sensor 2 Configuration Register -- Index 01h
NAME READ/WRITE DESCRIPTION
Power-on default [7:0] = 0000, 0000 b
BIT
7-5 4-3 2-1 0
Reserved FAULT Reserved Reserved
Read Read/Write Read/Write Read/Write
Read 0. Number of faults to detect before setting OVT# output to avoid false tripping due to noise. Reserved. Reserved.
9.3
Temperature Sensor 2 Hysteresis Register -- Index 02h
NAME READ/WRITE DESCRIPTION
Power-on - <15:0> = 0100,1011,0000,0000 b
BIT
15-7 6:0
THYST2[8:0] Reserved
Read/Write Read
Temperature hysteresis bit 8-0. The temperature default 75.0 degree C. Read 0.
9.4
Temperature Sensor 2 Over-temperature Register -- Index 03h
NAME READ/WRITE DESCRIPTION
Power-on - <15:0> = 0101,0000,0000,0000 b
BIT
15-7 6:0
TOVF2[8:0] Reserved
Read/Write Read
Over-temperature bit 8-0. The temperature default 80.0 degree C. Read 0.
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
10. TEMPERATURE SENSOR 3 (CPU T2) REGISTERS
The address of I2C is defined in Bank0.Reg4B.
10.1 Temperature Sensor 3 Temperature Register -- Index 00h
Read Only
BIT NAME READ/WRITE DESCRIPTION
15-7 6-0
TEMP2[8:0] Reserved
Read Only Read Only
Temperature bit [8:0] of sensor 2. (0.5 degree C precision). Read 0.
10.2 Temperature Sensor 3 Configuration Register -- Index 01h
Power-on - [7:0] = 0000, 0000 b
BIT NAME READ/WRITE DESCRIPTION
7-5 4-3 2-1 0
Reserved FAULT Reserved Reserved
Read Read/Write Read Only Read/Write
Read 0. Number of faults to detect before setting OVT# output to avoid false tripping due to noise. Read 0. Reserved
10.3 Temperature Sensor 3 Hysteresis Register -- Index 02h
Power-on default [15:0] = 0100,1011,0000,0000 b
BIT NAME READ/WRITE DESCRIPTION
15-7 6-0
THYST3[8:0] Reserved
Read/Write Read Only
Temperature hysteresis bit 8-0. The temperature default 75.0 degree C. Read 0.
10.4 Temperature Sensor 3 Over-temperature Register -- Index 03h
Power-on - [15:0] = 0101,0000,0000,0000 b
BIT NAME READ/WRITE DESCRIPTION
15-7 6-0
TOVF3[8:0] Reserved
Read/Write Read Only
Over-temperature bit 8-0. The temperature default 80.0 degree C. Read 0.
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
11. SPECIFICATIONS
11.1 Absolute Maximum Ratings
PARAMETER RATING UNIT
Power Supply Voltage Input Voltage Operating Temperature Storage Temperature
-0.5 to 7.0 -0.5 to VDD+0.5 0 to +70 -55 to +150
V V C C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device.
11.2 DC Characteristics
(Ta = 0 C to 70 C, VDD = 5V 10%, VSS = 0V)
PARAMETER SYM. MIN. TYP. MAX. UNIT CONDITIONS
I/O12t - TTL level bi-directional pin with source-sink capability of 12 mA Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Input High Leakage Input Low Leakage VIL VIH VOL VOH ILIH ILIL 2.4 +10 -10 2.0 0.4 0.8 V V V V A A IOL = 12 mA IOH = - 12 mA VIN = VDD VIN = 0V
I/O12ts - TTL level bi-directional pin with source-sink capability of 12 mA and schmitt-trigger level input Input Low Threshold Voltage Input High Threshold Voltage Hysteresis Output Low Voltage Output High Voltage Input High Leakage Input Low Leakage VtVt+ VTH VOL VOH ILIH ILIL 2.4 +10 -10 0.5 1.6 0.5 0.8 2.0 1.2 0.4 1.1 2.4 V V V V V A A V V 0.4 V VDD = 5 V VDD = 5 V VDD = 5 V IOL = 12 mA IOH = - 12 mA VIN = VDD VIN = 0V
OUT12t - TTL level output pin with source-sink capability of 12 mA Output Low Voltage Output High Voltage Output Low Voltage VOL VOH VOL 2.4 0.4 IOL = 12 mA IOH = -12 mA IOL = 8 mA
OD8 - Open-drain output pin with sink capability of 8 mA
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
DC Characteristics, continued.
PARAMETER
SYM.
MIN.
TYP.
MAX.
UNIT
CONDITIONS
OD12 - Open-drain output pin with sink capability of 12 mA Output Low Voltage Output Low Voltage INt - TTL level input pin Input Low Voltage Input High Voltage Input High Leakage Input Low Leakage INts Input Low Threshold Voltage Input High Threshold Voltage Hysteresis Input High Leakage Input Low Leakage VIL VIH ILIH ILIL VtVt+ VTH ILIH ILIL 0.5 1.6 0.5 0.8 2.0 1.2 +10 -10 2.0 +10 -10 1.1 2.4 0.8 V V A A V V V A A VIN = VDD VIN = 0 V VDD = 5 V VDD = 5 V VDD = 5 V VIN = VDD VIN = 0 V VOL VOL 0.4 0.4 V V IOL = 12 mA IOL = 48 mA OD48 - Open-drain output pin with sink capability of 48 mA
TTL level Schmitt-triggered input pin
11.3 AC Characteristics
t SCL
SCL
t HD;SDA
t HD;DAT t SU;STO
SDA IN
VALID DATA
t SU;DAT
SDA OUT Serial Bus Timing Diagram
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
Serial Bus Timing
PARAMETER SYMBOL MIN. MAX. UNIT
SCL clock period Start condition hold time Stop condition setup-up time DATA to SCL setup time DATA to SCL hold time SCL and SDA rise time SCL and SDA fall time
t SCL tHD;SDA tSU;STO tSU;DAT tHD;DAT tR tF
-
10 4.7 4.7 120 5 1.0 300
uS uS uS nS nS uS nS
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
12. HOW TO READ THE TOP MARKING
The top marking of W83L784R
W83L784R
2826978Y
046OA
Left: Winbond logo 1st line: Winbond logo and the type number: W83L784R 2nd line: Tracking code 2 826978Y 2: wafers manufactured in Winbond FAB 2 826978Y: wafer production series lot number 3rd line: Tracking code 046 O B 046: packages made in '00, week 46 O: assembly house ID; A means ASE, S means SPIL, O means OSE A: IC revision The top marking of W83L784G
W83L784G
2826978Y
046OA
Left: Winbond logo 1st line: Winbond logo and the type number: W83L784G 2nd line: Tracking code 2 826978Y 2: wafers manufactured in Winbond FAB 2 826978Y: wafer production series lot number 3rd line: Tracking code 046 O B 046: packages made in '00, week 46 O: assembly house ID; A means ASE, S means SPIL, O means OSE A: IC revision
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
13. PACKAGE DRAWING AND DIMENSIONS
20 SSOP-209 mil
D
2
11
SYMBOL
DIMENSION IN MM MIN. NOM MAX.
DIMENSION IN INCH MIN. NOM MAX.
DTEAIL A
HE E
A A1 A2 b c D E HE
2.00 0.05 1.65 0.22 0.09 6.90 5.00 7.40 0.55 1.75 1.85 0.38 0.25 7.50 5.60 8.20 0.95 0.10 8 0.002 0.065 0.009 0.004 0.272 0.197 0.291 0.021 0.283 0.209 0.307 0.0256 0.030 0.050 0.069
0.079 0.073 0.015 0.010 0.295 0.220 0.323 0.037 0.004 0 8
7.20 5.30 7.80 0.65 0.75 1.25
1
10
e L L1 Y
A2 A
SEATING PLANE
Y
SEATING PLANE
0
e
b
DETAIL A A1
L L1
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Publication Release Date: Jan. 2005 Revision 1.1
W83L784R/ W83L784G
14. W83L784R/G SCHEMATICS
Rev. 0.1: Ignore. 0.2: W83L784R application circuit. 0.3: Change Pin5,Pin6,Pin11 to LOW Active. Change Pin7 pull-up to 3VSB. 0.4: D1,D2,R9,R15 can be removed. Change R1 to 0 Ohm. Add R27,R28,R29,R30(Reserved). VCC (Refer Application Notice 1) 0.5: Add a pull-up resistor R31.
C1 CAP 10u VCC C2 CAP 0.1u Pull-up VBAT R31 R 10K R25 99K R R26 232K R BT1 BATTERY DC 10V
VOLTAGE SENSORING CIRCUIT
R8 10K R
VCORE
CPU_VCORE
+3.3VIN
R1 0
R
3VCC
3VCC
3VSB
U1 R6 4.7K FANFAULT# PWR_DN# EXTSMI# THRM# R7 4.7K R27 10K R28 10K R30 FANIN1 FANIN2 PWMOUT1 PWMOUT2 10K SMI# OVT# SCL SDA 1 2 3 4 5 6 7 8 9 10 FANIN1/GPO1 FANIN2/GPO2 PWMOUT1 PWMOUT2 FANFAULT#/GPO3 PWR_DN# SMI# OVT# SCL SDA W83L784R R29 10K VREF R14 30K 1% PIID+ R VT1/PII1 C4 CAP 3300p VCC CPUT1/PII1 CPUT2/PII2 VREF VIN1 RESET# VIN2(+3.3VIN) VIN3(VBAT) GND BATFAULT#/GPO4 20 19 18 17 16 15 14 13 12 11 VT1/PII1 VT2/PII2 VREF VCORE +3.3VIN VBAT RESET#
eg:
TO PIIX4
TEMPERATURE SENSORING CIRCUIT
VCC
BATFAULT#
SMARTFAN1 Speed Control Circuit
Fan5VCC R12 R11 4.7K 1K
PIIDFan5VCC VREF R13 10K 1% R10 4.7K R21 2K R
R23 4.7K
Q1 3906 JP1 3 2 1
D1 1N4148
THERMISTOR VT2/PII2
PWMOUT1 PWMOUT1 is open-drain default.
R19
4.7K
Q4 MOSFET N
C3 47u
+
Signal Power GND
FANIN1 R9 10K
Note: 1. CPUT1
is for CPU1 temperature and SMARTFAN 1 2. CPUT2 is for CPU2 temperature and SMARTFAN 2
HEADER 3 3VCC R4 R 4.7K 0 R5 R 4.7K SMDAT SMCLK R2 R 0
When 784 is power-down, Fan5VCC should be turned off.
SDA SCL
R R3
SMARTFAN2 Speed Control Circuit
Fan5VCC R18 R17 4.7K 1K
Fan5VCC
R24 4.7K
Q2 3906 JP2 3 2 1
D2 1N4148
R16 4.7K R22 2K
uP FANIN2 R15 10K
PWMOUT2
R20
4.7K
Q3 MOSFET N
C5 47u
+
Signal Power GND
RESET# FANFAULT# BATFAULT#
PWR_DN#
PWMOUT2 is open-drain default. When 784 is power-down, Fan5VCC should be turned off.
HEADER 3
WINBOND ELECTRONICS CORP. Title Size B Date: W83L784R Application Circuit Document Number 784AP.SCH Thursday, September 09, 1999 Sheet 1 of 1 Rev 0.5
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Publication Release Date: Jan. 2005 Revision 1.1
T
RT1
10K 1%
W83L784R/ W83L784G
These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sale.
Important Notice
Winbond products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or for other applications intended to support or sustain life. Further more, Winbond products are not intended for applications wherein failure of Winbond products could result or lead to a situation wherein personal injury, death or severe property or environmental damage could occur. Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales.
- 47 -
Publication Release Date: Jan. 2005 Revision 1.1

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